DP communication chip board
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Informática

DP communication chip board

Description

APC3 is an ASICs chip for PROFIBUS DP intelligent slave station development. APC3 supports the DPV0 part of the PROFIBUS DP standard.

Features

Compatible with VPC3 in mode DPVO, at the working voltage 3.3V

compatible with SPC3LV, at the working voltage 3.3V

Automatic indentifcation of 9.6Kpbs~12Mbps baud rate

Support Intel and Motorola processing interface modes

Parameters

Pin Function Definition

APC3 is packaged with PQFP with 44 pins. Pin definitions are shown in table below.

Pin Function Definition

Pin

Signal Name

ln/Out

Description

Source/Destination

1

XCS

l(C)

Chip-Select

C32 Mode : connect to VDD

C165 Mode: CS-Signal

CPU (80C165)

2

XWR/E_CLOCK

l(C)

Write signal /E_Clock for Motorola

CPU

3

DlVlDER

l(C)

Setting the scaling

Factor for CLKOUT2/4

'O' = CLK divided by 4

'1' = CLK divided by 2

4

XRD/R_W

l(C)

Read Signal / Read _Write for Motorola

CPU

5

CLK

l(TS)

Clock pulse input

System

6

VSS

7

CLKOUT2/4

O

Clock Output (System Clock divided by 2 or 4)

System, CPU

8

XlNT/MOT

l(C)

'0' = Intel Interface

'1' = Motorola Interface

Configuration Pin

9

X/lNT

O

lnterrupt

CPU; lnterrupt-Controller

10

AB10

l(CPD)

Address bus

C32 Mode: '0'

C165 Mode: Address Bus

System, CPU

11

DB0

l(C)/O

Data Bus

C32 Mode: Data/Address Bus multiplexed

C165 Mode: Data/Address Bus separated

CPU, Memory

12

DB1

l(C)/O

13

XDATAEXCH

O

Indicates DATA-EXCH state for PROFlBUS-DP

LED

14

XREADY/XDTACK

O

Ready for external CPU

System, CPU

15

DB2

l(C)/O

Data Bus

C32 Mode: Data/Address Bus multiplexed

C165 Mode: Data/Address Bus separated

CPU, Memory

16

DB3

l(C)/O

17

VSS

18

VDD

19

DB4

l(C)/O

Data Bus

C32 Mode: Data/Address Bus multiplexed C165 Mode: Data/Address Bus separated

CPU, Memory

20

DB5

l(C)/O

21

DB6

l(C)/O

22

DB7

l(C)/O

23

MODE

l

'0' = 80C166 Data/Address Bus separated; Ready Signal

'1' = 80C32 Data/Address Bus multiplexed, fixed Timing

Configuration Pin

24

ALE/AS

l(C)

Address latch

enable

C32 mode: ALE

C165 mode: 0

CPU (80C32)

25

AB9

l

Address bus

C32 Mode: '0'

C165 Mode: Address Bus

CPU (C165), memory

26

TXD

O

Serial send port

PROFIBUS Interface

27

RTS

O

Request to Send

PROFIBUS Interface

28

VSS

29

AB8

I(C)

Address bus

C32 Mode: '0'

C165 Mode: Address Bus

CPU (C165), memory

30

RXD

I(C)

Serial Receive Port

PROFIBUS Interface

31

AB7

I(C)

Address bus

C32 Mode: '0'

C165 Mode: Address Bus

CPU (C165), memory

32

AB6

I(C)

33

XCTS

I(C)

Clear to Send: 'O' = send enable

FSK Modem

34

XTEST0

I(C)

Pin must be connected to VDD.

35

XTEST1

I(C)

Pin must be connected to VDD.

36

RESET

I(CS)

Connect Reset Input with CPU's port pin.

37

AB4

I(C)

Address bus

C32 Mode: '0'

C165 Mode: Address Bus

CPU (C165), memory

38

VSS

39

VDD

40

AB3

I(C)

Address bus

C32 Mode: '0'

C165 Mode: Address Bus

CPU (C165), memory

41

AB2

I(C)

42

AB5

I(C)

43

AB1

I(C)

44

AB0

I(C)

Notes:

All signals beginning with an 'X' indicate "low level active."

Ubicación : wensu street hunnan new district, 110015 shenyang,
Persona a contactar : Yvette Jiang, +86 18304037682

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